Method and apparatus for improving CMP planarity

摘要

Provided is a method of planarizing a semiconductor device. A dielectric layer is formed over a substrate. A plurality of openings is formed in the dielectric layer. The openings have varying distribution densities. The openings are filled with a metal material. A first chemical-mechanical-polishing (CMP) process is performed to remove portions of the metal material over the dielectric layer. Thereafter, a sacrificial layer is formed over the dielectric layer and the metal material. The sacrificial layer has a planar surface. The sacrificial layer is formed through one of: a spin-on process or a flowable chemical vapor deposition (FCVD) process. A second CMP process is then performed to remove the sacrificial layer and portions of the dielectric layer and the metal material therebelow. The second CMP process uses a slurry configured to have a substantially similar polishing selectivity between the sacrificial layer, the dielectric layer, and the metal material.

主权项

1. A method, comprising:
providing a substrate having a structure formed thereon, wherein the structure has an uneven surface and contains a conductive material; forming a layer directly on the uneven surface of the structure, wherein the layer has a planar surface across an entirety of the layer; and polishing the layer and the structure therebelow, wherein the polishing includes using an etching chemical that is configured to have substantially similar etching rates for the layer and the structure, and wherein the polishing completely removes the layer and exposes at least a portion of the conductive material of the structure.