发明名称 INTEGRATED CIRCUIT WITH MULTI-RECESSED SHALLOW TRENCH ISOLATION
摘要 PROBLEM TO BE SOLVED: To provide a method for forming multi-recessed shallow trench isolation.SOLUTION: A photoresist layer having a first pattern is formed on a substrate, and a first STI structure having a first depth is formed by using the photoresist layer as a mask. A second photoresist layer having a second pattern is formed, and a second STI structure having a second depth is formed by using the second photoresist layer as a mask. The second photoresist layer is removed, and a third photoresist layer having a third pattern is formed to form a third STI structure. Thereafter, the substrate is flattened.SELECTED DRAWING: Figure 3b
申请公布号 JP2016181717(A) 申请公布日期 2016.10.13
申请号 JP20160119322 申请日期 2016.06.15
申请人 TAIWAN SEMICONDUCTOR MANUFACTUARING CO LTD 发明人 LEE TSUNG-LIN;CHANG CHANG-YUN
分类号 H01L21/76 主分类号 H01L21/76
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