发明名称 TESTING CIRCUIT
摘要 <p>The test arrangement is intended to test, for example, a modem whose transmitter and receiver are coupled to the transmission line by means of a hybrid junction and comprises an echo canceller. The test consists of comparing a test signal applied to the transmitter with the signal restituted by the receiver when the modem is fedback from the line side. The test arrangement comprises an adder one input of which receives the error signal coming from the echo canceller, the other input receiving, during the test the feedback signal, its output being connected to the receiver. Means have been provided to make the signal restituted by the receiver different from the test sequence, when the error signal of the echo canceller exceeds a threshold.</p>
申请公布号 JPS55104151(A) 申请公布日期 1980.08.09
申请号 JP19800012090 申请日期 1980.02.05
申请人 TRT TELECOM RADIO ELECTR 发明人 ROATSUKU BERUNAARU IIBU GIDOO
分类号 H04B3/20;H04B3/23;H04B3/46;H04L1/24;H04L27/00;H04L29/14 主分类号 H04B3/20
代理机构 代理人
主权项
地址