发明名称 TIMING OF ACTIVE PULLUP FOR DYNAMIC SEMICONDUCTOR MEMORY
摘要 <p>A method for operating a dynamic semiconductor memory circuit (10) having a memory cell (12) which comprises an access transistor (12a) connected to a half digit line (18) and a storage capacitor (12b). Each of the half digit lines (18, 22, 60 and 62) is charged or discharged as a result of either read operations carried out with the corresponding memory cells or write operations receiving incoming data states through input/output lines (42, 46). The charged state of the half digit line (18, 22, 60 and 62) is at a voltage substantially below that of the supply voltage of the circuit (10). After the half digit lines (18, 22, 60 and 62) are sensed and/or written to the desired states, a pull up circuit (48) for each of the half digit lines with voltages above a predetermined threshold to the full supply voltage. A work line signal (72) couples the charge storage capacitor (12b) to the corresponding half digit line (18) to transfer the full supply voltage of the circuit (10) into the storage capacitor (12b). </p>
申请公布号 WO1981002358(A1) 申请公布日期 1981.08.20
申请号 US1980000506 申请日期 1980.05.05
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