发明名称 DRIVING PULSE GENERATION SYSTEM FOR SOLIDSTATE IMAGE PICKUP ELEMENT
摘要 PURPOSE:To increase the transfer efficiency of an output image and the dynamic range, by switching each switch of a multiplexer selectively with the signal obtained through the logical combination of each pulse in binary coded number. CONSTITUTION:The clock pulse 18 obtained from the clock pulse generating circuit and the pulse 19 designating the period of the signal charge transferred from the P-N junction to the cgarge transfer element, are applied to the logic level conversion circuit 20. The decoder 21 converts the binary number into ternary number. In the 3-channel multiplexer 22, either one of SW1, SW2, SW3 is switched according to each voltage of LS-L at L level of the line shift pulse which transfers the signal charge preset to the readout section, H level LS-H, and designation pulse TR-H for the period transferred from the P-N junction to the CCD for the signal charge. The waveform obtained is introduced to the waveform shaping circuit 24 and output from the output terminal 26.
申请公布号 JPS56147567(A) 申请公布日期 1981.11.16
申请号 JP19800049549 申请日期 1980.04.17
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 ENDOU YUKIO;YOSHIDA OKIO
分类号 H04N3/14;H04N5/335;H04N5/341;H04N5/347;H04N5/355;H04N5/3728;H04N5/378 主分类号 H04N3/14
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