发明名称 MULTICHANNEL DIGITAL TIMER
摘要 PURPOSE:To enable generation of timing pulse after set time regardless of absolute time by reflecting the counting value of a counter in the point of time when a trigger for timer driving is applied, to the set time. CONSTITUTION:A clock pulse generated by a clock pulse generator 1 is counted at all times by a counter 2. The counter 2 disregards overflow. When a trigger 4 is applied to the first channel, the contents of a register 5 and the contents of the counter 2 at the point of time are sent to an adder 3, and the result is written in the register 5 again. At the same time, the counting value of the counter 2 and the contents of the reset register 5 are compared by a comparator 6, and when they coincide, a signal is sent to a timing pulse generator 7 to output a timing pulse.
申请公布号 JPS573081(A) 申请公布日期 1982.01.08
申请号 JP19800076646 申请日期 1980.06.09
申请人 HITACHI LTD 发明人 NAKAYAMA HISAHIDE;MATSUO SATOSHI
分类号 G04F3/00;G04G15/00;G05B19/02;H03K17/296 主分类号 G04F3/00
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