发明名称 FORMING METHOD FOR BURIED WIRING
摘要 PURPOSE:To form and laminate flat wiring layers through nonselective ion etching by coating the wiring layers shaped onto an insulating layer patterned with resists and flatly forming the layers. CONSTITUTION:The insulating layer 2 on a semiconductor substate 1 is patterned, contact holes, etc. are shaped, and an Al conductor layer 3 is formed onto the whole surface. The resist layer 4 is flatly shaped onto the whole surface through an application method, and the whole surface is etched through nonselective etching such as reactive ion etching to form the flat wiring surface. Multilayer wiring can be shaped without generating disconnection by also forming each wiring 6 after the second layer, insulating layers 5, etc. similarly.
申请公布号 JPS57188846(A) 申请公布日期 1982.11.19
申请号 JP19810072329 申请日期 1981.05.15
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 YAMAMOTO EIICHI;NAKAMURA HIROAKI
分类号 H01L21/3205;(IPC1-7):01L21/88 主分类号 H01L21/3205
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