Hash generation circuitry and methods for multi-channel, multi-lane encryption and authentication

摘要

Encryption/authentication circuitry includes an authentication portion operating on a plurality of lanes of encrypted data spanning a number of channels, and including hash constant storage for a predetermined maximum number of channels, and partial hash selection circuitry for determining, for each respective lane, a respective hash index into the hash constant storage. Wind-down mode detection circuitry also is described, as well as a method of operating such circuitry also is provided.

主权项

1. Encryption and authentication circuitry comprising:
an encryption circuit outputting at least one lane of encrypted data spanning a number of channels; and an authentication circuit operating on said at least one lane of encrypted data spanning said number of channels, said authentication circuit including: hash constant storage for a predetermined maximum number of channels, partial hash selection circuitry for determining, for each respective lane, a respective hash index into said hash constant storage, and an adder for adding, to data in said at least one lane of encrypted data, a hash constant selected from said hash constant storage using said respective hash index.