| 摘要 |
PURPOSE:To prevent the restriction of the size of systems by the size of master chips by a method wherein the first basic cells consisting of a plurality of the first conductivity type transistors and the second basic cells consisting of a plurality of the second conductivity transistors are arranged respectively in the direction of rows. CONSTITUTION:The row of the first basic cells 131 is formed by a method wherein the first basic cells 151... consisting of a plurality of P-channel MOS type transistors which form the group of transistors becoming symmetric left and right based on the center line in a vertical direction are successively disposed in an array in the direction of rows. The row of the second basic cells 32 is formed by a method wherein the second basic cells 152... consisting of a plurality of N-channel MOS type transistor which form the group of transistors becoming left and right based on the center line in a vertical direction are successively disposed in an array. These rows of basic cells 131 and 132 are provided successively in alternation. |
