发明名称 PROCESSING CAPABILITY MEASURING DEVICE
摘要 PURPOSE:To obtain easily the throngh put of a microcomputer by calculating and displaying the through put at each prescribed period in an externally mounted device measuring the through put of an on-line system using a microcomputer. CONSTITUTION:An address collating circuit 3 references information from a running address storage circuit 4 at idle time to collate whether or not the sampled address is within the address running at the predetermined idle time. Furthermore, whether and address is in idle state or in the state of program execution is discriminated and if the state is in the idle state, the running time is counted and the result of count is stored in a storage circuit 5. After a prescribed period is elapsed, a measuring period generating circuit 7 computes the through put of the microcomputer 1 by using the count value from a through put counter circuit 6 representing whether the state is in the idle state or in the state of program execution and displays the result on a display device 9.
申请公布号 JPS60122439(A) 申请公布日期 1985.06.29
申请号 JP19830230853 申请日期 1983.12.07
申请人 FUJITSU KK 发明人 TSUKAMOTO NOBUAKI;ITOU MASAHIRO;KOIKE TAKAYASU;SHIGENO KIYOFUMI
分类号 G06F11/34;G06F11/30;(IPC1-7):G06F11/30 主分类号 G06F11/34
代理机构 代理人
主权项
地址