| 摘要 |
PURPOSE:To realize very simply a multi-value NMOS integrated circuit by using an NMOS transistor (TR) having a threshold voltage set by ion implantation as a pull-down TR of a basic inverter. CONSTITUTION:The relation between logical values {0, 1, 2, 3} and a voltage value are selected as {0V, 2V, 4V, 6V}. The potential at points 1, 2, 3, 4 in a 4- value T gate is designed to be a Vcc when the logical value of (x) is 0, 1, 2, 3 respectively and nearly 0V in other cases. That is, a value of (VTC1+VTC2)/2 is set so as to be coincident with a threshold voltage (nearly a middle value between two logical values) at which desired switching is expected in one inverter. Moreover, TRs M15-M18 are pass TRs and they are turned on when the gate voltage is Vcc and turned off when 0V. Thus, a signal at any of terminals P0, P1, P2 and P3 is outputted to a Tout in correspondence to the control input.
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