发明名称 INFORMATION PROCESSOR
摘要 <p>PURPOSE:To optimize the processing speed of a computer as a whole by changing dynamically the speed of a CPU in accordance with the speed of a device connected to the CPU. CONSTITUTION:A memory 3 and an I/O 3 are arranged on the logical address space of a CPU 1, and by a control device 4 to decode and address bus 5 and a control signal 7, writing and reading are controlled. The control device 4 holds the information of the number of the weight and the clock speed in accordance with the speed of a memory 2 and an I/O 3. The CPU 1, each time the memory 2 and the I/O 3 are accessed, adjusts the number of the weight of the CPU 1 with a control line 10 and adjusts the clock speed with a control line 11.</p>
申请公布号 JPS62191960(A) 申请公布日期 1987.08.22
申请号 JP19860034426 申请日期 1986.02.19
申请人 SEIKO EPSON CORP 发明人 NIIMURA MINORU
分类号 G06F1/08;G06F13/42 主分类号 G06F1/08
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