发明名称 MEMORY ERROR DETECTING METHOD
摘要 PURPOSE:To avoid the deterioration of reliability of a memory error detecting system which is caused by the continuous error recovery processing, by deciding that the recovery of a memory error is impossible and stopping the entire operation of the system when a memory error occurs again during the recovery processing of the preceding memory error. CONSTITUTION:When a parity error occurs, this fact is latched by a parity error latch part 1040 and then transmitted to an interruption input INT of a program processing control part 1010 via a signal line 1041. If a parity error occurs again right after the interruption processing is started, the AND conditions are secured via a gate 1060 between the signal delivered to a signal line 1031 from a parity check part 1030 and the output 1041 of the part 1040. Thus a fact of the second occurrence of a parity error is latched by a parity error latch part 1050. The output of the part 1050 is transmitted to the WAIT input of a control part 1010 via a signal line 1051. The part 1010 is set under a WAIT state and stops its processing. Thus it is possible to select the countermeasure processing in response to the contents of the parity error and to avoid the deterioration of the system reliability caused by the continuous error recovery processing.
申请公布号 JPS63124156(A) 申请公布日期 1988.05.27
申请号 JP19860269706 申请日期 1986.11.14
申请人 HITACHI LTD;HITACHI TECHNO ENG CO LTD 发明人 KOJIMA TAKASHI;KAMIURA KAZUO;ARIMOTO MASANOBU
分类号 G06F12/16 主分类号 G06F12/16
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