发明名称 Line interface circuit.
摘要 In a line interface circuit for binary data signals means are provided for compensating varying lengths of line in the receiving and/or transmission path. The output signal of a line equalizer controls a variable impedance circuit in such a way that attenuation of a line build out network is reduced if the output level of the line equalizer is falling below a threshold. A transmit line build out network provides a frequency dependent attenuation of binary data by means of a control circuit, which supplies discrete attenuation values according to a logic word.
申请公布号 EP0367208(A2) 申请公布日期 1990.05.09
申请号 EP19890120157 申请日期 1989.10.31
申请人 ANT NACHRICHTENTECHNIK GMBH 发明人 MEASOR, GRAHAME C.
分类号 H04L25/02;H04L25/03;H04L25/12 主分类号 H04L25/02
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