发明名称 VERTICAL OUT-PUT PUMP-UP CIRCUIT
摘要 The vertical output pump-up circuit for varying a vertical output voltage according to the flyback time and scanning time of the vertical output circuit to reduce the consumption power, includes a transistor (Q1) connected to a vertical output circuit (1) through a resistor (R2); a transistor (Q2) connected to the circuit (1) through a resistor (R3); a power terminal (Vcc) connected to a base of the transistor and a collector of the transistors (Q3)(Q5)(Q7); and a diode (D1) connected between the base and emitter of the transistor (Q1). The vertical output circuit (1) outputs a high voltage for flyback time (T1) and a low voltage for scanning time (T2).
申请公布号 KR900008232(B1) 申请公布日期 1990.11.06
申请号 KR19870010851 申请日期 1987.09.29
申请人 GOLD STAR CO.,LTD. 发明人 LEE KAN-JONG
分类号 H04N3/18;(IPC1-7):H04N3/18 主分类号 H04N3/18
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