Processes for making reliable VCSEL devices and VCSEL arrays

摘要

A set of VCSEL fabrication methods has been invented which enhance the performance and long time reliability of VCSEL devices and arrays of devices. Wafer bow caused by growing a large number of epitaxial layers required to fabricate VCSEL device generates strain and results in bowing/warping of the device wafer. The stress so generated is eliminated by applying a stress compensation layer on the substrate to a surface opposite to the epitaxial layer surface. New oxidation equipment designs and process parameters are described which produce more precision apertures and reduce stress in the VCSEL device. An ultrathin fabrication procedure is described which enables high power VCSELs to be made for high power operation at many different wavelengths. A low temperature electrical contacting process improves VCSEL long term reliability.

主权项

1. A process of fabricating a VCSEL device wafer comprising the steps of:
providing a semiconductor substrate; growing in a pre-determined sequence, a stack of one or more epitaxial layers of semiconductor material including the steps of growing at least a first reflector, a gain region and a second reflector according to a pre-determined design of a VCSEL device structure for a desired output characteristics, on one surface of the semiconductor substrate; growing additional one or more epitaxial layer including at least one oxidation layer, at respective pre-determined location relative to the gain region; etching a plurality of mesas of a pre-determined size and to a pre-determined depth not to exceed the thickness of the stack of one or more epitaxial layers; oxidizing the at least one oxidation layer to a desired width from the edge towards the center of the plurality of mesas, thereby creating within the plurality of mesas, a respective plurality of apertures smaller in diameter with respect to the corresponding mesas; and growing to a pre-determined thickness, a strain compensation layer on a second opposing surface of the semiconductor substrate, such that the VCSEL device wafer including the semiconductor substrate, the one or more epitaxial layers and the strain compensation layer is substantially free of bow and/or warp.