| 摘要 |
PURPOSE:To reduce the size of hardware without deteriorating its performance by calculating a code value by a code value calculating means in each division and calculating the code value of the combination of all quantized functions by the 2nd code value calculating means. CONSTITUTION:Out of code values 7a to 7f calculated by code value calculators 6a to 6f, the code values in a low area and a high area are added by code value calculators 8a to 8e, slight correction such as the correction of additional information are applied to the added values and code values 9a to 9e in each orthogonal transformation block unit. In such configuration, code value calculation in each rectangular conversion block unit can be reduced and the number of hardwares for the code value calculators in the whole coding device can be reduced. |
