Line deflection circuit for TV receiver - has pulse shaper with adjusted threshold value between transformer secondary and PLL circuit

摘要

The line deflection circuit has an end stage transistor (Tl) and a line transformer (Tr) with a primary coil (7), a HV coil (8) and a secondary coil (9). A line synchronisation pulse (Z) and a flyback pulse (P) from the secondary are applied to a PLL circuit (1), whose line frequency output voltage (12) is applied to the transistor base. Between the secondary and the PLL circuit is a pulse shaper (13) with threshold value adjusted to the voltage value (Us), at which the flanks of the flyback pulses (P1, P2) w.r.t. the line synchronising pulse have a control point (S) at min. and max. beam current. USE/ADVANTAGE - For high quality TV receivers. Removes beam current influence on phase of line deflection.