发明名称 プログラマブルロジックデバイス
摘要 A programmable logic device includes a plurality of arithmetic circuits; a configuration changing circuit for changing a logic state of each of the plurality of arithmetic circuits by rewriting configuration data; a power supply control circuit for switching between start and stop of supply of power supply voltage to the plurality of arithmetic circuits; a state memory circuit for storing data on configuration, data on a state of power supply voltage, data on use frequency, and data on last use of each of the plurality of arithmetic circuits; and an arithmetic state control circuit for controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. One of the plurality of arithmetic circuits includes a transistor comprising an oxide semiconductor film in a channel formation region.
申请公布号 JP6049969(B2) 申请公布日期 2016.12.21
申请号 JP20130038903 申请日期 2013.02.28
申请人 株式会社半導体エネルギー研究所 发明人 米田 誠一
分类号 H03K19/173;H01L21/82;H01L21/822;H01L27/04 主分类号 H03K19/173
代理机构 代理人
主权项
地址