发明名称 |
SPLIT LOOP TIMING RECOVERY |
摘要 |
Various embodiments provide systems and methods for performing clock recovery on a received signal using a split loop architecture. A split loop timing recovery apparatus is provided comprising a first path configured for performing frequency offset tracking on a signal by adjusting a receiver clock frequency to match a remote transmitter frequency associated with the signal and a second path configured for tracking random jitter on the signal. |
申请公布号 |
US2016365970(A1) |
申请公布日期 |
2016.12.15 |
申请号 |
US201615208769 |
申请日期 |
2016.07.13 |
申请人 |
APPLIED MICRO CIRCUITS CORPORATION |
发明人 |
Malkin Moshe;Gupta Tarun |
分类号 |
H04L7/00;H04B1/04;H04L12/26 |
主分类号 |
H04L7/00 |
代理机构 |
|
代理人 |
|
主权项 |
1. A split loop timing recovery apparatus, comprising:
a first path configured for performing frequency offset tracking on a signal by adjusting a receiver clock frequency to match a remote transmitter frequency associated with the signal; and a second path configured for tracking random jitter on the signal, wherein a bandwidth associated with timing recovery is partitioned between the first path and the second path based on an analysis of the signal. |
地址 |
Santa Clara CA US |