| 摘要 |
A buffer of reduced size includes a logic gate to raise the potential level of input digital data having a first logic level to a potential equal to a low power supply potential, and to produce intermediate data if a validation signal is active. The buffer also includes a tristate inverter to produce output data, at an output, that are logically inverse to the intermediate data if the validation signal is active and having its output at high impedance if otherwise. Such a buffer is particularly useful as an output buffer for contact cards using a power supply potential different from a potential powering a reader with which the card communicates.
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