主权项 |
1. An integrated circuit die, comprising:
(a) channel circuitry having a channel interface that includes:
(i) a bidirectional data input/output path for a test mode select signal, a test data in signal, and a test data out signal;(ii) a clock input lead, and(iii) a linking module interface that includes a test mode select output lead, a test data in output lead, a test data out input lead, and a test clock output lead; (b) a scan TAP domain connected to combinational logic and having a TAP interface that includes a test mode select input, a test data input, a test clock input, and a test data output; and (c) a BIST TAP domain connected to the combinational logic and having a TAP interface that includes a test mode select input, a test data input, a test clock input, and a test data output; and (d) TAP linking module circuitry having a first interface connected to the linking module interface of the channel circuitry, a second interface connected to the TAP interface of the scan TAP domain, and a third interface connected to the TAP interface of the BIST TAP domain. |