发明名称 Tuning capacitance to enhance FET stack voltage withstand
摘要 An RF switch to controllably withstand an applied RF voltage Vsw, or a method of fabricating such a switch, which includes a string of series-connected constituent FETs with a node of the string between each pair of adjacent FETs. The method includes controlling capacitances between different nodes of the string to effectively tune the string capacitively, which will reduce the variance in the RF switch voltage distributed across each constituent FET, thereby enhancing switch breakdown voltage. Capacitances are controlled, for example, by disposing capacitive features between nodes of the string, and/or by varying design parameters of different constituent FETs. For each node, a sum of products of each significant capacitor by a proportion of Vsw appearing across it may be controlled to approximately zero.
申请公布号 US9595956(B2) 申请公布日期 2017.03.14
申请号 US201514883122 申请日期 2015.10.14
申请人 Peregrine Semiconductor Corporation 发明人 Englekirk Robert Mark
分类号 H01L21/00;H03K17/687;H03K17/10;H03K17/693;H01H11/00;H03K17/16;H03K17/06 主分类号 H01L21/00
代理机构 Jaquez Land Greenhaus LLP 代理人 Jaquez Land Greenhaus LLP ;Jaquez, Esq. Martin J.;Steinfl, Esq. Alessandro
主权项 1. A stacked transistor RF switch apparatus, comprising: a transistor stack including a plurality of constituent transistors all coupled in series connection drain to source to form a series string for which internal nodes are those between adjacent transistors; and at least one discrete physical capacitor element Ccomp coupled between an internal node and a parasitic drain capacitance of the series string of the stack, Ccomp having an impedance that is predominantly capacitive at primary frequencies of signals ordinarily controlled by the RF switch apparatus.
地址 San Diego CA US