发明名称 Method for determining by optimization a multi-core architecture
摘要 The invention relates to a method for determining by optimization a multi-core architecture and a way of implementing an application on the architecture for a given application, the method comprising: providing a parallelized application and candidate architectures comprising different hardware blocks,defining a first exploration space whose elements are the different ways of implementing the application on each of the candidate architectures,selecting, in the first exploration space, the elements verifying a criterion to obtain a second exploration space,determining, in the second exploration space, the elements verifying a criterion to obtain a third exploration space,computing the number of data exchanged between the hardware blocks for each of the elements of the third exploration space to obtain a fourth exploration space, andoptimizing the elements of the fourth exploration space according to a criterion.
申请公布号 US9594863(B2) 申请公布日期 2017.03.14
申请号 US201514841782 申请日期 2015.09.01
申请人 THALES ;UNIVERSITE DE NANTES 发明人 Brillu Romain;Millet Philippe;Pillement Sébastien;Lemonnier Fabrice
分类号 G06F9/455;G06F17/50;G06F9/50 主分类号 G06F9/455
代理机构 Green Patent Law 代理人 Lane Eric L.;Green Patent Law
主权项 1. A method for determining by optimization a multi-core architecture and a way of implementing an application on the architecture for a given application, the method comprising: providing a parallelized application, a parallelized application being a set of tasks, providing candidate architectures, each candidate architecture comprising different hardware blocks, a hardware block having a specific nature and being able to execute one or more tasks, defining a first exploration space whose elements are the different ways of implementing the application on each of the candidate architectures, selecting, in the first exploration space, the elements verifying a first criterion according to which each task of the application is suitable for being implemented on only one or several hardware blocks, to obtain a second exploration space comprising the elements of the first exploration space meeting the first criterion, determining, in the second exploration space, the elements verifying a second criterion, the second criterion being different from the first criterion and requiring that the number of hardware blocks separating a first hardware block implementing a first task and a second hardware block implementing a second task different from the first task, is less than or equal to a value specific to the two tasks in question, to obtain a third exploration space comprising the elements of the second exploration space meeting the second criterion, computing the number of data exchanged between the hardware blocks for each of the elements of the third exploration space and comparing each computed number to a threshold value, in order to obtain a fourth exploration space comprising the elements of the third exploration space whose number of exchanged data is less than or equal to the threshold value, and optimizing the elements of the fourth exploration space according to a third criterion, the third criterion being different from the first criterion and from the second criterion.
地址 Courbevoie FR