发明名称 IMAGE PROCESSING APPARATUS
摘要 Image data output from an image capturing unit is input to an image processing circuit, and the image processing circuit is connected in cascade to another image processing circuit. With the image processing circuit, a portion of the image data for which processing is shared is processed by the image processing circuit, the processed image data is multiplexed by a multiplexing unit with another portion of the image data to be processed by the other image processing circuit, and is transmitted to the other image processing circuit by an output IF unit. The other image processing circuit processes its share of the image data and displays it along with the processed image data received from an image processing unit.
申请公布号 US2017070696(A1) 申请公布日期 2017.03.09
申请号 US201615258601 申请日期 2016.09.07
申请人 CANON KABUSHIKI KAISHA 发明人 SHIRAISHI Yasuhiro
分类号 H04N5/374;H04N1/00;H04N5/378 主分类号 H04N5/374
代理机构 代理人
主权项 1. An image processing apparatus comprising: an image capturing unit; a first image processing circuit connected to the image capturing unit; and a second image processing circuit connected to the first image processing circuit, wherein a first memory is connected to the first image processing circuit and a second memory is connected to the second image processing circuit, the first image processing circuit includes: a separation unit configured to separate moving image data output from the image capturing unit into first data, which is a portion to be processed by the first image processing circuit, and second data, which is a portion to be processed by the second image processing circuit;a first image processing unit configured to carry out predetermined processing on the first data output from the separation unit and to store the processed first data in the first memory;a transmission unit configured to read out the first data processed by the first image processing unit from the first memory, multiplex the second data from the separation unit and the processed first data read out from the first memory, and transmit the multiplexed data to the second image processing circuit; anda first control unit configured to control the transmission unit, the second image processing circuit includes: a reception unit configured to receive the multiplexed data transmitted by the transmission unit and separate the multiplexed data into the second data and the processed first data;a storage unit configured to store the processed first data received by the reception unit in a buffer;a writing unit configured to read out the processed first data from the storage unit and store the processed first data in the second memory;a second image processing unit configured to carry out the predetermined processing on the second data received by the reception unit and store the processed second data in the second memory; anda detection unit configured to output a control signal to the first image processing circuit in response to a data amount of the processed first data stored in the buffer reaching a threshold value, and wherein the first control unit controls the transmission unit so as to stop transmission of the processed first data in response to the control signal from the detection unit.
地址 Tokyo JP