SEMICONDUCTOR TESTING DEVICES

摘要

A method for fabricating a test structure on a wafer includes forming a fin on a substrate, forming a first gate stack over the fin, the first gate stack having a first gate width, the first gate stack including a gate dielectric layer having a first thickness, forming a second gate stack over the fin, the second gate stack having a second gate width, the second gate stack including a gate dielectric layer having a second thickness, and forming a third gate stack over the fin, the third gate stack having a third gate width, the third gate stack including a gate dielectric layer having the second thickness, wherein the first gate stack is arranged a first distance from the second gate stack and the second gate stack is arranged the first distance from the third gate stack.

主权项

1. A method for fabricating a test structure on a wafer, the method comprising:
forming a semiconductor fin on a substrate; forming a first dummy gate stack over the fin, the first dummy gate stack having a first width; forming a second dummy gate stack over the fin, the second dummy gate stack having a second width; forming a third dummy gate stack over the fin, the third dummy gate stack having a third width, the first dummy gate stack is spaced a first distance from the second dummy gate stack, the second dummy gate stack spaced the first distance from the third dummy gate stack; forming a source/drain regions on exposed portions of the fin; removing the first dummy gate, the second dummy gate, and the third dummy gate to expose channel regions of the fin; depositing a layer of dielectric material over the channel regions of the fin; depositing a block mask to obscure a channel region of the fin; removing the layer of dielectric material from exposed channel regions of the fin; removing the block mask; depositing a high-k dielectric layer; and depositing a work function metal to form a first gate stack, a second gate stack, and a third gate stack.