SYSTEM AND METHOD FOR ADJUSTING DUTY CYCLE IN CLOCK SIGNALS

摘要

A device and method are disclosed. The device and method allow the clock signal of a wireless communication device to produce an oscillation with a 50% duty cycle. The device and method allows quick convergence to a 50% duty cycle after power up and also provides stability of the duty cycle across variations in ambient temperature and power supply fluctuations. The device includes, but is not limited to a buffer, a first inverter electrically coupled to the buffer, a second inverter electrically coupled to the first inverter, and a differential integrator, wherein a first output of the first inverter is electrically coupled to a first input of the differential integrator, wherein a second output of the second inverter is electrically coupled to a second input of the differential integrator, and wherein a third output of the differential integrator is electrically connected to the buffer.

主权项

1. A device comprising:
a buffer; a first inverter electrically coupled to the buffer, a second inverter electrically coupled to the first inverter; and a differential integrator,
wherein a first output of the first inverter is electrically coupled to a first input of the differential integrator,wherein a second output of the second inverter is electrically coupled to a second input of the differential integrator, andwherein a third output of the differential integrator is electrically connected to the buffer.