Method of manufacturing semiconductor device

摘要

In a semiconductor device formed by mounting a chip laminate including a semiconductor chip having a small diameter and a semiconductor chip having a large diameter over the top surface of a substrate, an excessive stress is prevented from being added to a joint of the two semiconductor chips. By mounting a first semiconductor chip having a large diameter over a support substrate and thereafter mounting a second semiconductor chip having a small diameter over the first semiconductor chip, it is possible to: suppress the inclination and unsteadiness of the second semiconductor chip mounted over the first semiconductor chip; and hence inhibit an excessive stress from being added to a joint of the first semiconductor chip and the second semiconductor chip.

主权项

1. A semiconductor device, comprising:
(a) a first substrate having a first surface; (b) a first semiconductor chip mounted over said first surface of said first substrate such that a first back surface of said first semiconductor chip faces said first surface of said first substrate,
wherein said first semiconductor chip has a first main surface opposite to said first back surface, a first main surface pad formed on said first main surface, and a first conductive member formed over said first main surface pad; (c) a second semiconductor chip mounted over said first main surface of said first semiconductor chip such that a second back surface of said second semiconductor chip faces said first main surface of said first semiconductor chip, said first main surface pad of said first semiconductor chip being electrically connected with a second back surface pad of said second semiconductor chip via said first conductive member,
wherein said second semiconductor chip has a second main surface opposite to said second back surface, a second main surface pad formed over said second main surface, and a second conductive member formed over said second main surface pad,wherein said second back surface pad is formed on said second back surface and electrically connected with said second main surface pad, andwherein, in plan view, an area of said second semiconductor chip is smaller than an area of said first semiconductor chip; (d) a one-piece body of sealing material sealing said first semiconductor chip, said second semiconductor chip, and said second conductive member; (e) a base substrate mounted directly to said sealing material such that a third surface of said base substrate faces said first surface of said first substrate, a bonding lead formed on said third surface of said base substrate being electrically connected with said second conductive member of said second semiconductor chip,
wherein a fourth surface of said base substrate is opposite to said third surface, andwherein a bump land is formed on said fourth surface and electrically connected with said bonding lead; and(f) an external terminal formed on said bump land.