| 发明名称 | Method of using dummy patterns for overlay target design and overlay control | ||
| 摘要 | Methodologies for using dummy patterns for overlay target design and overlay control are provided. Embodiments include providing a first dummy pattern on a first layer as an outer overlay target for an integrated circuit (IC); providing a pattern associated with a second dummy pattern on a second layer as a target for measuring overlay; and utilizing a scanning electron microscope (SEM) to obtain an overlay measurement between the first and second dummy patterns. | ||
| 申请公布号 | US9633915(B1) | 申请公布日期 | 2017.04.25 |
| 申请号 | US201615057727 | 申请日期 | 2016.03.01 |
| 申请人 | GLOBALFOUNDRIES INC. | 发明人 | Park Dongsuk;Zhou Yue;Karakoy Mert |
| 分类号 | H01L21/66;H01J37/28;G01B15/00 | 主分类号 | H01L21/66 |
| 代理机构 | Ditthavong & Steiner, P.C. | 代理人 | Ditthavong & Steiner, P.C. |
| 主权项 | 1. A method comprising: providing a first dummy pattern on a first layer as an outer overlay target for an integrated circuit (IC); providing a pattern associated with a second dummy pattern on a second layer as a target for measuring overlay; and utilizing a scanning electron microscope (SEM) to obtain an overlay measurement between the first and second dummy patterns. | ||
| 地址 | Grand Cayman KY | ||