Through-silicon via access device for integrated circuits

摘要

A through-silicon via access device (TSVAD) for establishing an electrical connection to a through-silicon via (TSV) located in a planar stack of semiconductor chips is disclosed. The TSVAD may include a switching circuit, having a conductive pad terminal, a TSV terminal, an input terminal coupled to a sending logic circuit, an output terminal coupled to a receiving logic circuit, and logic devices to, in response to control signals, couple the TSV terminal to the conductive pad terminal, in one configuration, and couple the TSV terminal to another terminal in another configuration. The TSVAD may also include a control circuit to generate control signals to cause an input selection circuit to drive a signal from the sending logic circuit onto the input terminal, and to cause an output selection circuit to drive a logic signal from the output terminal to the receiving logic circuit.

主权项

1. A method of operating through-silicon via access devices (TSVADs) to establish an electrical interconnection between at least two semiconductor chips located in a planar stack of semiconductor chips, the method comprising:
initializing a set of control parameters used by a control circuit; loading the initialized set of control parameters into a state machine; generating, in response to the initialized set of control parameters, a set of control signals; controlling, using the set of control signals, logical devices to establish a first electrical interconnection that includes a first through-silicon via (TSV) and a first conductive pad, between at least two TSVADs in the at least two semiconductor chips; changing, in response to a change of the control parameters, a state of the state machine; generating, in response to the changed state of the state machine, a modified set of control signals; and modifying, using the modified set of control signals, the electrical interconnection between the at least two TSVADs in the at least two semiconductor chips, wherein the state machine is configured to generate the set of control signals based on configuration data accessible by the state machine and held in a serial scan latch configured to be written to and read from by a scan engine coupled to the state machine.