发明名称 METHOD OF MANUFACTURING PHOTOVOLTAIC DEVICE HAVING ULTRA-SHALLOW JUNCTION LAYER
摘要 The present invention relates to a method of manufacturing a photovoltaic device having an ultra-shallow junction layer. In the method, a crystalline silicon substrate is cleaned and a first doped semiconductor layer with 1.12 eV bandgap and 5˜80 nm of thickness is grown on the crystalline silicon substrate by high density plasma electron cyclotron resonance CVD in a preparation condition of a temperature of the crystalline silicon substrate ranging from 50° C. to 250° C. , about 500W of microwave power, deposition pressure below 50 mTorr, about 20 sccm of argon and hydrogen flow rate, SiH4 flow rate ranging from 1 sccm to 2 sccm, and 2% boroethane flow rate ranging from about 5 seem to 15 sccm. The photovoltaic device of the present invention has advantages of abrupt homo-junction, ultra-thin high-crystallinity silicon-based thin film, highly-doped concentration, high conductivity and high short-circuit current, thereby having improved efficiency.
申请公布号 US2017110600(A1) 申请公布日期 2017.04.20
申请号 US201514883347 申请日期 2015.10.14
申请人 NATIONAL CENTRAL UNIVERSITY 发明人 CHANG Jenq-Yang;LEE Chien-Chieh;LI Ting-Tung;CHU Yen-Ho;CHANG Teng-Hsiang;WANG Shih-Hung
分类号 H01L31/0216;H01L31/0224;H01L31/068;H01L31/18 主分类号 H01L31/0216
代理机构 代理人
主权项 1. A method of manufacturing a photovoltaic device having an ultra-shallow junction layer, comprising: step (a00): cleaning a crystalline silicon substrate; step (a01): growing an epitaxy silicon layer on a surface of the crystalline silicon substrate by using a high density plasma electron cyclotron resonance CVD under a preparation condition of a temperature of the crystalline silicon substrate ranging from 50° C. to 250° C., about 500 W of microwave power, deposition pressure below 50 mTorr, about 20 sccm of argon flow rate, about 20 sccm of hydrogen flow rate, SiH4 flow rate ranging from 1 sccm to 2 sccm and 2% boroethane flow rate ranging from about 5 sccm to 15 sccm, wherein the epitaxy silicon layer is defined as a first doped semiconductor layer and has a thickness ranging from 5 nm to 80 nm and about 1.12 eV of bandgap; and step (a02): forming a first electrode on a surface of the first doped semiconductor layer.
地址 Taoyuan City TW