发明名称 Semiconductor module, semiconductor module arrangement and method for operating a semiconductor module
摘要 A semiconductor module includes a first semiconductor switch, a second semiconductor switch, a circuit carrier arrangement and a non-ceramic dielectric isolation layer. The first semiconductor switch and the second semiconductor switch have a first load terminal and a second load termina. The current path of the first semiconductor switch and the current path of the second semiconductor switch are electrically connected in series between a first circuit node and a second circuit node. A circuit carrier arrangement includes a dielectric first isolation carrier section, a dielectric second isolation carrier section, a first upper metallization layer, a second upper metallization layer and a third upper metallization layer, a first lower metallization layer, and a second lower metallization layer. The non-ceramic dielectric isolation layer is applied to the first lower metallization layer and the second lower metallization layer, and its underside forms a heat dissipating contact area of the semiconductor module.
申请公布号 US9627356(B2) 申请公布日期 2017.04.18
申请号 US201615177908 申请日期 2016.06.09
申请人 Infineon Technologies AG 发明人 Hohlfeld Olaf
分类号 H01L23/495;H01L25/065;H01L23/498;H01L23/373;H01L23/367 主分类号 H01L23/495
代理机构 Murphy, Bilak & Homiller, PLLC 代理人 Murphy, Bilak & Homiller, PLLC
主权项 1. A semiconductor module comprising: a first semiconductor switch and a second semiconductor switch, each of which comprises a first load terminal and a second load terminal, between which a current path is formed, wherein the current path of the first semiconductor switch and the current path of the second semiconductor switch are electrically connected in series between a first circuit node and a second circuit node; a circuit carrier arrangement comprising: a dielectric first isolation carrier section having a first top side and a first underside opposite the latter;a dielectric second isolation carrier section having a second top side and a second underside opposite the latter;a first upper metallization layer, which is applied to the first top side;a second upper metallization layer and a third upper metallization layer, which are applied to the second top side;a first lower metallization layer, which is applied to the first underside;a second lower metallization layer, which is applied to the second underside; and a non-ceramic dielectric isolation layer, which is applied to the first lower metallization layer and to the second lower metallization layer and which has an underside facing away from the first lower metallization layer and the second lower metallization layer, said underside forming a heat dissipating contact area of the semiconductor module.
地址 Neubiberg DE
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