Bumpless build-up layer package warpage reduction

摘要

The present disclosure relates to the field of fabricating microelectronic packages and the fabrication thereof, wherein a microelectronic device may be formed within a bumpless build-up layer coreless (BBUL-C) microelectronic package and wherein a warpage control structure may be disposed on a back surface of the microelectronic device. The warpage control structure may be a layered structure comprising at least one layer of high coefficient of thermal expansion material, including but not limited to a filled epoxy material, and at least one high elastic modulus material layer, such as a metal layer.

主权项

1. A method of fabricating a microelectronic package comprising:
forming a microelectronic device having an active surface, an opposing back surface, and at least one side; disposing a die backside film contacting the microelectronic device back surface; forming a warpage control structure contacting the die backside film, wherein the warpage control structure is formed by forming a high coefficient of thermal expansion material layer contacting the die backside film and forming a high elastic modulus material layer contacting the high coefficient of thermal expansion material layer; disposing an encapsulation material contacting at least a portion of the microelectronic device active surface, at least a portion of the at least one microelectronic device side, at least a portion of the die backside film, and at least a portion of the warpage control structure, wherein the encapsulation material includes a first surface proximate the microelectronic device active surface and a second surface opposing the encapsulation material first surface; and forming a package-on-package pad in or on the encapsulation material second surface.