发明名称 |
TRANSISTOR AND METHOD FOR FORMING THE SAME |
摘要 |
The present disclosure provides a method for forming a transistor, including: forming a base structure, containing a first gate structure, an active layer covering the first gate structure, and an insulating structure in the active layer; forming a second gate structure on the active layer; forming a source-drain region, including a source region and a drain region in the active layer each on a different side of the second gate structure; and forming a first interlayer dielectric layer covering the base structure and the second gate structure. The method also includes: forming a first contact hole that exposes the first gate structure by etching the first interlayer dielectric layer and the insulating structure; and forming a second contact hole that exposes the second gate structure and a third contact hole that exposes the drain region by etching the first interlayer dielectric layer. |
申请公布号 |
US2017104084(A1) |
申请公布日期 |
2017.04.13 |
申请号 |
US201615280214 |
申请日期 |
2016.09.29 |
申请人 |
Semiconductor Manufacturing International (Beijing) Corporation ;Semiconductor Manufacturing International (Shanghai) Corporation |
发明人 |
HUANG HERB HE;DROWLEY CLIFFORD IAN;LI HAI TING;ZHU JI GUANG |
分类号 |
H01L29/66;H01L21/311;H01L21/306;H01L29/786;H01L21/762 |
主分类号 |
H01L29/66 |
代理机构 |
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代理人 |
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主权项 |
1. A method for forming a transistor, comprising:
forming a base structure, containing a first gate structure, an active layer covering the first gate structure, and an insulating structure in the active layer; forming a second gate structure on the active layer; forming a source-drain region, including a source region and a drain region in the active layer each on a different side of the second gate structure; forming a first interlayer dielectric layer covering the base structure and the second gate structure; forming a first contact hole that exposes the first gate structure by etching the first interlayer dielectric layer and the insulating structure; forming a second contact hole that exposes the second gate structure and a third contact hole that exposes the drain region by etching the first interlayer dielectric layer; and filling the first contact hole, the second contact hole, and the third contact hole with a conductive material to form a first plug structure, a second plug structure, and a third plug structure, that are aligned along a substantially same direction. |
地址 |
Beijing CN |