Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon region

摘要

An improved transistor with channel epitaxial silicon. In one aspect, a method of fabrication includes: forming a gate stack structure on an epitaxial silicon region disposed on a substrate, a width dimension of the epitaxial silicon region approximating a width dimension of the gate stack structure; and growing a raised epitaxial source and drain from the substrate, the raised epitaxial source and drain in contact with the epitaxial silicon region and the gate stack structure. For a SRAM device, further: removing an epitaxial layer in contact with the silicon substrate and the raised source and drain and to which the epitaxial silicon region is coupled leaving a space above the silicon substrate and under the raised epitaxial source and drain; and filling the space with an insulating layer and isolating the raised epitaxial source and drain and a channel of the transistor from the silicon substrate.

主权项

1. A transistor comprising:
a silicon substrate; trenches formed in the silicon substrate; an isolation layer formed on the silicon substrate between a first one of the trenches and a second one of the trenches; an epitaxial silicon region formed on a first portion of the isolation layer, the epitaxial silicon region being isolated from the substrate by the isolation layer; a raised source and drain in contact with second and third portions of the isolation layer and in contact with the epitaxial silicon region, the first portion of the isolation layer on which the epitaxial silicon region is formed being between the second and third portions of the isolation layer, the raised source and drain being isolated from the substrate by the isolation layer; and a gate stack structure in contact with the epitaxial silicon region and in contact with the raised source and drain.