Liquid ejection device and printing device

摘要

A liquid ejection device includes a switching circuit. The switching circuit includes: a multilayer wiring board including a first wiring layer and a second wiring layer; a first transistor and a second transistor mounted on the first wiring layer side of the multilayer wiring board; and a capacitor mounted on the second wiring layer side of the multilayer wiring board. When the multilayer wiring board is viewed in a plan view, a third via conductor is arranged in an area not overlapping a straight-line path connecting a source electrode of the first transistor with a drain electrode of the second transistor in a second wire.

主权项

1. A liquid ejection device comprising a switching circuit, the switching circuit including:
a multilayer wiring board including a first wiring layer and a second wiring layer; a first transistor and a second transistor mounted on the first wiring layer side of the multilayer wiring board; and a capacitor mounted on the second wiring layer side of the multilayer wiring board, wherein the multilayer wiring board includes
a first wire, a second wire, and a third wire formed in the first wiring layer,a fourth wire, a fifth wire, and a sixth wire formed in the second wiring layer,a first via conductor electrically connecting the first wire with the fourth wire,a second via conductor electrically connecting the third wire with the fifth wire, anda third via conductor electrically connecting the second wire with the sixth wire, a drain electrode of the first transistor is electrically connected with the first wire, a source electrode of the first transistor is electrically connected with the second wire, a drain electrode of the second transistor is electrically connected with the second wire, a source electrode of the second transistor is electrically connected with the third wire, a first electrode of the capacitor is electrically connected with the fourth wire, a second electrode of the capacitor is electrically connected with the fifth wire, and when the multilayer wiring board is viewed in a plan view no via conductor electrically connects the second wire and the sixth wire in an area overlapping a straight-line path connecting the source electrode of the first transistor with the drain electrode of the second transistor in the second wire, wherein the multilayer wiring board further includes an eighth wire formed in the first wiring layer, a gate electrode of the second transistor is electrically connected with the eighth wire, and when the multilayer wiring board is viewed in the plan view, the fifth wire and the eighth wire are formed at positions where at least a portion of the fifth wire and at least a portion of the eighth wire overlap each other.