发明名称 PWM signal generator and switching power supply device having same
摘要 A PWM signal generator includes a delay circuit unit, which includes a plurality of delay elements connected in series, an output terminal of the delay element in a final stage among the plurality of delay elements and an input terminal of the delay element in an initial stage among the plurality of delay elements being connected to each other; a selector, which selects any one of output signals of the plurality of delay elements based on a digital value; a PWM signal output unit, which outputs a PWM signal based on the output signal selected by the selector; a delay-amount detector, which detects an amount of delay of a signal due to the delay circuit unit; and a digital value generator, which generates the digital value by correcting predetermined data based on the amount of delay detected by the delay-amount detector.
申请公布号 US9621040(B2) 申请公布日期 2017.04.11
申请号 US201514830840 申请日期 2015.08.20
申请人 Sanken Electric Co., LTD. 发明人 Mima Kazuhiro;Yukiyama Hiroki;Yamazaki Takanaga
分类号 H03K7/08;H02M3/156;H03K5/133;H03K5/00 主分类号 H03K7/08
代理机构 Banner & Witcoff, Ltd. 代理人 Banner & Witcoff, Ltd.
主权项 1. A PWM signal generator comprising: a delay circuit unit, which includes a plurality of delay elements connected in series, an output terminal of the delay element in a final stage among the plurality of delay elements and an input terminal of the delay element in an initial stage among the plurality of delay elements being connected to each other; a selector, which selects any one of output signals of the plurality of delay elements based on a digital value; a PWM signal output unit, which outputs a PWM signal based on the output signal selected by the selector; a delay-amount detector, which detects an amount of delay of a signal due to the delay circuit unit; a digital value generator, which generates the digital value by correcting predetermined data based on the amount of delay detected by the delay-amount detector; and a counter, which counts a pulse signal output from any delay element among the plurality of delay elements, wherein the delay-amount detector detects a count value, which is counted by the counter in a unit period, as the amount of delay, and wherein the digital value generator generates the predetermined data by correcting the digital value based on the count value and a predetermined expected count value in the unit period.
地址 Niiza-shi, Saitama JP