发明名称 DIE STACKING METHOD
摘要 A die stacking method is provided. The die stacking method includes executing a manufacturing recipe, and loading an interposer-die mapping file according to the manufacturing recipe. The interposer-die mapping file corresponds to an interposer wafer including interposer dies. The die stacking method also includes loading a combination setting data according to the interposer-die mapping file, and loading a top die number and a top-die ID code of a top-die mapping file according to the combination setting data and the interposer-die mapping file. The top-die ID code corresponds to a top wafer including top dies, and the top die number corresponds to one of the top dies. The die stacking method also includes disposing the one of the top dies of the top wafer on one of the interposer dies of the interposer wafer.
申请公布号 US2017098639(A1) 申请公布日期 2017.04.06
申请号 US201615380712 申请日期 2016.12.15
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 JANN Larry;CHANG Chih-Chien;CHUANG Po-Wen;CHIU Ming-I;LIN Chang-Hsi;LI Chih-Chan;HU Yi-Ting
分类号 H01L25/00;H01L23/498;H01L21/67 主分类号 H01L25/00
代理机构 代理人
主权项 1. A method, comprising: executing a manufacturing recipe by a computer; loading an interposer-die mapping file according to the manufacturing recipe by the computer, wherein the interposer-die mapping file corresponds to an interposer wafer including a plurality of interposer dies; loading a combination setting data by the computer according to the interposer-die mapping file; loading a top die number and a top-die ID code of a top-die mapping file by the computer according to the combination setting data and the interposer-die mapping file, wherein the top-die ID code corresponds to a top wafer comprising a plurality of top dies, and the top die number corresponds to one of the top dies, and the combination setting data includes a plurality of settings defining combinations of the top dies and the interposer dies; and disposing the one of the top dies of the top wafer on one of the interposer dies of the interposer wafer.
地址 Hsinchu TW