发明名称 Method of fabricating an integrated circuit with enhanced defect repairability
摘要 The present disclosure provides one embodiment of a method for extreme ultraviolet lithography (EUVL) process. The method includes loading a mask to a lithography system. The mask includes defect-repaired regions and defines an integrated circuit (IC) pattern thereon. The method also includes setting an illuminator of the lithography system in an illumination mode according to the IC pattern, configuring a pupil filter in the lithography system according to the illumination mode and performing a lithography exposure process to a target with the mask and the pupil filter by the lithography system in the illumination mode.
申请公布号 US9612531(B2) 申请公布日期 2017.04.04
申请号 US201414221362 申请日期 2014.03.21
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Lu Yen-Cheng;Yu Shinn-Sheng;Chen Jeng-Horng;Yen Anthony
分类号 G03F1/72;G03F7/20;G03F1/24 主分类号 G03F1/72
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A method for extreme ultraviolet lithography (EUVL), comprising: loading a mask to a lithography system, wherein the mask includes: a reflective region;an opaque region that includes an absorption layer;a defect-repaired region over a defect in the reflective region, wherein the defect-repaired region includes an absorber material deposited over the defect; andan absorption-layer-absent (ALA) region in the opaque region, wherein the ALA region is formed by removing a portion of the absorption layer in the opaque region; configuring a pupil filter in the lithography system according to an illumination mode; and performing a lithography exposure process to a target with the mask and the pupil filter by the lithography system in the illumination mode, wherein the pupil filter blocks an amount of reflection light, reflected from the mask, to expose the target.
地址 Hsin-Chu TW