发明名称 METHOD, DEVICE AND SYSTEM TO PROVIDE CAPACITANCE FOR A DYNAMIC RANDOM ACCESS MEMORY CELL
摘要 Techniques and mechanisms to provide capacitance with a memory cell of an integrated circuit. In an embodiment, a transistor of the memory cell includes structures variously formed in or on a first side of a semiconductor substrate. After processing to form the transistor structures, thinning is performed to expose a second side of the semiconductor substrate, the second side opposite the first side. Processing in or on the exposed second side of the semiconductor substrate is subsequently performed to form in the semiconductor substrate a capacitor that extends to couple to one of the transistor structures. In another embodiment, the capacitor is coupled to accumulate charge based on activation of a channel of the transistor. The capacitor is further coupled to send charge from the memory cell via the second side.
申请公布号 WO2017052645(A1) 申请公布日期 2017.03.30
申请号 WO2015US52455 申请日期 2015.09.25
申请人 INTEL CORPORATION 发明人 LILAK, Aaron;MORROW, Patrick;MEHANDRU, Rishabh;NELSON, Donald W.;CEA, Stephen M.
分类号 H01L27/108 主分类号 H01L27/108
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