MULTI-LAYER HARDMASK ETCH PROCESSES

摘要

Many silicon wafers include a mixture of structures including a first number of first structures, such as memory elements, having a first height and high component density and a second number of second structures, such as logic elements, having a second height that is greater than the first height and low component density. An etch process may be used to achieve the high component density using a multi-layer hardmask in which a first hardmask is formed on a surface of the semiconductor wafer. After forming the first hardmask, an etch process may be used to provide or otherwise facilitate the fabrication of a first number of first structures having a relatively high component density. A second hardmask may be selectively fabricated on at least a portion of the first hardmask. The combined thickness of first hardmask and the second hardmask may approximately equal the height of the second structures.