COMMON CIRCUIT FOR GOA TEST AND ELIMINATING POWER-OFF RESIDUAL IMAGES

摘要

The invention discloses a common circuit for GOA test and eliminating power-off residual images, including a first test end (3), a test signal line (AT1) connected to the first test end (3), a second test end (5), a feedback signal line (AT2) connected to the second test end (5), and the same number of test TFTs (T0) as cascade GOA unit circuits. By connecting the gate of each test TFT (T0) to test signal line (AT1), the source to feedback signal line (AT2) and the drain to the output end of corresponding GOA unit circuit and gate scan line, the invention can test the output signal of any stage GOA unit circuit to determine the location of a malfunctioning GOA unit circuit, and releasing the residual charges of the liquid crystal capacitor and storage capacitor at the display area of LCD panel when powering off to eliminate residual images.

主权项

1. A common circuit for gate driver on array (GOA) test and eliminating power-off residual images, which comprises:
a plurality of cascade GOA unit circuits, disposed at a side of a display area (1) of an LCD panel, for a positive integer n, an output end of n-th stage GOA unit circuit connected to a corresponding n-th gate scan line (Gate(n)) of the LCD panel; a first test end (3), disposed at a side of the display area (1) of the LCD panel; a second test end (5), disposed at a side of the display area (1) of the LCD panel; a test signal line (AT1), disposed at a side of the display area (1) of the LCD panel and electrically connected to the first test end (3); a feedback signal line (AT2), disposed at a side of the display area (1) of the LCD panel and electrically connected to the second test end (5); and a plurality of test thin film transistors (TFT) (T0), the number of the test TFTs (T0) being the same as the plurality of cascade GOA unit circuits, disposed at a side of the display area (1) of the LCD panel; wherein each test TFT (T0) having a gate electrically connected to the test signal line (AT1), a source electrically connected to the feedback signal line (AT2), and a drain electrically connected to the output end of a corresponding GOA unit circuit and a corresponding gate scan line.