发明名称 HEADER TRANSFORMATION DATAPATH
摘要 A communication packet processing device may include a control stage coupled to receive multiple headers of a packet comprised of multiple words, and to determine a destination lane for each word of the multiple headers by counting previous words of the headers. The device may also include a level 1 permutation circuit coupled to the control stage to place each word into a correct lane responsive to the determined destination lane, and a level 2 permutation circuit coupled to the level 1 permutation t circuit o place each word into a correct designation lane responsive to the determined destination lane. Additional embodiments are also described.
申请公布号 US2017093708(A1) 申请公布日期 2017.03.30
申请号 US201514865868 申请日期 2015.09.25
申请人 Papadantonakis Karl S.;Southworth Robert G.;Gravel Alain;Dama Jonathan A. 发明人 Papadantonakis Karl S.;Southworth Robert G.;Gravel Alain;Dama Jonathan A.
分类号 H04L12/741;H04L29/06 主分类号 H04L12/741
代理机构 代理人
主权项 1. A communication packet processing device comprising: a control stage coupled to receive multiple headers of a packet comprised of multiple words, and to determine a destination lane for each word of the multiple headers by counting previous words of the multiple headers to provide a determined destination lane for each word; a level 1 permutation circuit coupled to the control stage to place each word into an output lane according to the determined destination lane; and a level 2 permutation circuit having an input coupled to an output of the level 1 permutation circuit, the level 2 permutation circuit to place each word into a correct designation lane according to the determined destination lane.
地址 Agoura Hills CA US