发明名称 Method for fast 3D video coding for HEVC
摘要 The present disclosure relates to the technical field of video coding. Implementations herein provide methods for fast 3D video coding for high efficiency video coding HEVC. The methods speed up the view synthesis process during the rate distortion optimization for depth coding based on texture flatness. The implementations include extracting coding information from textures, analyzing luminance regularity among pixels from flat texture regions based on statistical method, judging the flat texture regions using the luminance regularity for depth maps and terminating the flat texture block's view synthesis process when processing rate distortion optimization. Compared to original pixel-by-pixel rendering methods, the implementations reduce coding time without causing significant performance loss.
申请公布号 US9609361(B2) 申请公布日期 2017.03.28
申请号 US201414889559 申请日期 2014.12.06
申请人 Beijing University of Technology 发明人 Jia Kebin;Dou Huan
分类号 H04N19/597;H04N19/147;H04N19/186;H04N19/176;H04N19/182;H04N19/159;H04N19/14 主分类号 H04N19/597
代理机构 Tian IP & Technology, LLC. 代理人 Tian IP & Technology, LLC.
主权项 1. A method for high efficiency video coding (HEVC) 3D video coding, the method comprising: (1.1) extracting coding information from coded textures, the coding information including a block size represented by n×n, a coding mode represented by Mode and an individual pixel luminance value in reconstructed blocks represented by Y; (1.2) analyzing luminance regularity among pixels from flat texture regions, selecting blocks of which the Mode is IntraDC as flat texture blocks using the coding information obtained in step (1.1), storing sizes and pixel luminance values of the flat texture blocks, and analyzing the luminance regularity among the pixels from the flat texture blocks based on a predetermined statistical method to set a threshold represented by T; (1.3) dividing a current depth block into l flat lines and m non-flat lines using the threshold T obtained in step (1.2) during a view synthesis process of rate distortion optimization for depth map coding to obtain flat line and non-flat line division results; and (1.4) terminating the view synthesis process for the pixels in flat lines and decreasing high coding complexity caused by a pixel-by-pixel view synthesis process using the division results obtained in step (1.3).
地址 Beijing CN