发明名称 Semiconductor device, electronic component, and electronic device
摘要 To provide a small driver IC, in a pass transistor logic circuit that converts k-bit digital signals into analog signals, transistors supplied with a first-bit signal are arranged in a line in the channel width direction. The channel width of transistors supplied with second to kth-bit signals is made larger than (e.g., preferably larger than two times and smaller than eight times) that of the transistors supplied with the first-bit signal. The transistors are preferably arranged such that transistors of the same conductivity type are located adjacent to each other wherever possible.
申请公布号 US9607569(B2) 申请公布日期 2017.03.28
申请号 US201514844436 申请日期 2015.09.03
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Takahashi Kei;Sato Keita
分类号 G09G3/36;H01L27/12;H01L29/786 主分类号 G09G3/36
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A semiconductor device comprising: first to seventh transistors and first to fifth wirings, wherein: a gate of the first transistor is electrically connected to the first wiring, one of a source and a drain of the first transistor is supplied with a first voltage, the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the fifth transistor, a gate of the second transistor is electrically connected to the second wiring, one of a source and a drain of the second transistor is supplied with a second voltage, the other of the source and the drain of the second transistor is electrically connected to the one of the source and the drain of the fifth transistor, a gate of the third transistor is electrically connected to the first wiring, one of a source and a drain of the third transistor is supplied with a third voltage, the other of the source and the drain of the third transistor is electrically connected to one of a source and a drain of the sixth transistor, a gate of the fourth transistor is electrically connected to the second wiring, one of a source and a drain of the fourth transistor is supplied with a fourth voltage, the other of the source and the drain of the fourth transistor is electrically connected to the one of the source and the drain of the sixth transistor, a gate of the fifth transistor is electrically connected to the third wiring, the other of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the seventh transistor, a gate of the sixth transistor is electrically connected to the fourth wiring, the other of the source and the drain of the sixth transistor is electrically connected to the one of the source and the drain of the seventh transistor, a gate of the seventh transistor is electrically connected to the fifth wiring, the first wiring is supplied with a first signal, the second wiring is supplied with an inversion signal of the first signal, the third wiring is supplied with a second signal, the fourth wiring is supplied with an inversion signal of the second signal, the fifth wiring is supplied with a third signal, and a channel width of each of the first to fourth transistors is smaller than a channel width of each of the fifth to seventh transistors.
地址 Atsugi-shi, Kanagawa-ken JP
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