发明名称 PSEUDO DUAL PORT MEMORY
摘要 Aspects of a memory and method for accessing the memory are disclosed. The memory includes a plurality of memory cells configured to support a read and write operation in a memory cycle in a first mode and a write only operation in the memory cycle in a second mode. The memory further includes a control circuit configured to generate a read clock for the read operation and a write clock for the write operation. The timing of the write clock is a function of the timing of the read clock in the first mode, and the timing of the memory cycle in the second mode.
申请公布号 WO2017048440(A1) 申请公布日期 2017.03.23
申请号 WO2016US47219 申请日期 2016.08.16
申请人 QUALCOMM INCORPORATED 发明人 KWOK, Tony Chung Yiu;DESAI, Nishith Nitin;JUNG, Changho
分类号 G06F13/16;G11C7/22 主分类号 G06F13/16
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