Power transistor

摘要

A power transistor includes a number of transistor cells. Each transistor cell includes a source region, a drain region, a body region and a gate electrode. Each source region is arranged in a first semiconductor fin of a semiconductor body. Each drain region is at least partially arranged in a second semiconductor fin of the semiconductor body. The second semiconductor fin is spaced from the first semiconductor fin in a first horizontal direction of the semiconductor body. Each gate electrode is arranged in a trench adjacent the first semiconductor fin, is adjacent the body region, and is dielectrically insulated from the body region by a gate dielectric. Each of the first and second semiconductor fins has a width in the first horizontal direction and a length in a second horizontal direction, wherein the length is larger than the width.

主权项

1. A power transistor comprising:
a semiconductor body comprising a plurality of semiconductor fins that are spaced in a first lateral direction of the semiconductor body, and a semiconductor layer adjoining the semiconductor fins in a vertical direction of the semiconductor body, wherein the plurality of semiconductor fins comprises a first group of first semiconductor fins and a second group of second semiconductor fins, wherein a width of the second semiconductor fins of the second group is larger than a width of the first semiconductor fins of the first group; a plurality of source regions, wherein each first semiconductor fin of the first group includes one of the plurality of source regions; a plurality of drain regions, wherein each second semiconductor fin of the second group includes one of the plurality of drain regions; a plurality of body regions, wherein each body region is arranged between one of the plurality of source regions and one of the plurality of drain regions; a plurality of gate electrodes, wherein each gate electrode is arranged in a corresponding trench adjacent one of the first group of first semiconductor fins, is adjacent one of the plurality of body regions, and is dielectrically insulated from the one of the plurality of body regions by a gate dielectric; a source node electrically coupled to each of the source regions; a drain node electrically coupled to each of the drain regions; and a gate node electrically coupled to each of the gate electrodes.