发明名称 Data accessing method, memory controlling circuit unit and memory storage apparatus
摘要 A data accessing method for a memory storage apparatus is provided. The method includes using a first check code circuit to generate a first check code corresponding to a first data stream and generating a first data set based on the first data stream and the first check code. The method also includes using a second check code circuit to obtain the first data stream and the first check code from the first data set and check the first data stream according to the first check code. The method still includes using a third check code circuit to generate a second check code according to the checked first data stream and generating a data frame based on the checked first data stream and the second check code and thereby programming the data frame into a physical programming unit.
申请公布号 US9600363(B2) 申请公布日期 2017.03.21
申请号 US201514736284 申请日期 2015.06.11
申请人 PHISON ELECTRONICS CORP. 发明人 Yeh Chih-Kang;Lin Chang-Guang
分类号 G11B20/18;G06F11/10;G11C29/52;H03M13/29;G06F3/06 主分类号 G11B20/18
代理机构 Jianq Chyun IP Office 代理人 Jianq Chyun IP Office
主权项 1. A data accessing method for a memory storage apparatus, wherein the memory storage apparatus has a rewritable non-volatile memory module, the rewritable non-volatile memory module has a plurality of physical erasing units, and each of the physical erasing units has a plurality of physical programming units, the data accessing method comprising: receiving a first data stream, generating a first check code corresponding to the first data stream by using a first check code circuit, and generating a first data set according to the first data stream and the first check code corresponding to the first data stream; obtaining the first data stream and the first check code corresponding to the first data stream from the first data set by using a second check code circuit and checking the first data stream by using the first check code corresponding to the first data stream; generating a second check code according to information corresponding to the checked first data stream by using a third check code circuit; generating an error checking and correcting code by using an error checking and correcting circuit; generating a data frame according to the checked first data stream, the second check code, and the error checking and correcting code; and writing the data frame to a first physical programming unit of the physical programming units, wherein the first check code circuit is different from the third check code circuit.
地址 Miaoli TW