发明名称 Method of manufacturing a fin-like field effect transistor (FinFET) device
摘要 A FinFET device and method for fabricating a FinFET device is disclosed. An exemplary FinFET device includes a semiconductor substrate; a fin structure disposed over the semiconductor substrate; and a gate structure disposed over a portion of the fin structure. The gate structure traverses the fin structure and separates a source region and a drain region of the fin structure, the source and drain region defining a channel therebetween. The source and drain region of the fin structure include a strained source and drain feature. The strained source feature and the strained drain feature each include: a first portion having a first width and a first depth; and a second portion disposed below the first portion, the second portion having a second width and a second depth. The first width is greater than the second width, and the first depth is less than the second depth.
申请公布号 US9601598(B2) 申请公布日期 2017.03.21
申请号 US201414447223 申请日期 2014.07.30
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Perng Tsu-Hsiu;Yeh Chih Chieh;Chen Tzu-Chiang;Ho Chia-Cheng;Chang Chih-Sheng
分类号 H01L21/336;H01L29/66;H01L29/165;H01L29/78;H01L21/02;H01L21/306;H01L29/161 主分类号 H01L21/336
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A method comprising: forming a fin structure over a substrate; forming a first gate structure over a first portion of the fin structure and a second gate structure over a second portion of the fin structure, wherein a third portion of the fin structure interposes the first and second portions; forming seal spacers on sidewalls of each of the first gate structure and the second gate structure; forming dummy spacers adjacent to each of the seal spacers; forming a trench having a first U-shaped profile in the fin structure, wherein the trench has a first sidewall collinear with a first dummy spacer on the first gate structure and a second opposing sidewall collinear with a second dummy spacer on the second gate structure, and a first bottom curvilinear surface extending to a first depth, wherein the first and second sidewalls and the first bottom curvilinear surface are defined by the fin structure; thereafter, removing the dummy spacers; modifying the trench having the first U-shaped profile in the fin structure, such that the trench has a second profile at an upper region of the trench and the first U-shaped profile at a lower region of the trench, wherein the upper region of the trench has a third sidewall collinear with a first seal spacer on the first gate structure and a fourth opposing sidewall collinear with a second seal spacer on the second gate structure, and wherein the modifying the trench includes increasing a depth of the trench to a second depth greater than the first depth, wherein increasing the depth includes etching the first bottom curvilinear surface of the fin structure to form a second curvilinear surface at the second depth, the second bottom curvilinear surface defined by the fin structure, and wherein the second depth to first depth has a ratio of approximately 1 to 2/3; and epitaxially (epi) growing a semiconductor material in the trench after the modifying.
地址 Hsin-Chu TW