发明名称 Packed data operation mask concatenation processors, methods, systems and instructions
摘要 A method of an aspect includes receiving a packed data operation mask concatenation instruction. The packed data operation mask concatenation instruction indicates a first source having a first packed data operation mask, indicates a second source having a second packed data operation mask, and indicates a destination. A result is stored in the destination in response to the packed data operation mask concatenation instruction. The result includes the first packed data operation mask concatenated with the second packed data operation mask. Other methods, apparatus, systems, and instructions are disclosed.
申请公布号 US9600285(B2) 申请公布日期 2017.03.21
申请号 US201113977239 申请日期 2011.12.22
申请人 Intel Corporation 发明人 Toll Bret L.;Valentine Robert;Corbal San Adrian Jesus;Ould-Ahmed-Vall Elmoustapha;Charney Mark
分类号 G06F15/00;G06F15/76;G06F9/30;G06F13/14 主分类号 G06F15/00
代理机构 Vecchia Patent Agent, LLC 代理人 Vecchia Patent Agent, LLC
主权项 1. A method comprising: receiving a packed data operation mask concatenation instruction, the packed data operation mask concatenation instruction indicating a first source having a first packed data operation mask, indicating a second source having a second packed data operation mask, and indicating a destination, wherein the first packed data operation mask is stored in bits [7:0] of the first source, and the second packed data operation mask is stored in bits [7:0] of the second source; and storing a result in the destination in response to the packed data operation mask concatenation instruction, the result including the first packed data operation mask concatenated with the second packed data operation mask, wherein storing the result includes storing the first packed data operation mask in bits [7:0] of the destination and the second packed data operation mask in bits [15:8] of the destination.
地址 Santa Clara CA US